The present invention relates to a semiconductor device, and more particularly, to a semiconductor memory device in which each individual memory cell is formed of a single transistor and a capacitive storage unit.
The capacitive storage unit of the semiconductor memory device is generally a MOS capacitor composed of a semiconductor substrate as a lower electrode, a thin insulating film on the semiconductor substrate as a dielectric film, and a conductive layer on the this insulating film as an upper electrode. The sandwiched insulating film may be silicon oxide, silicon oxide and silicon nitride and the upper electrode may be made of polycrystalline silicon, aluminum, molybdenum, or Al-Si alloy.
For the semiconductor memory device of the mentioned type, the requirements of high integration density and microfabrication have recently been more and more increased. For meeting such requirements, the size of the MOS capacitor have to be compact without decreasing its capacitance. For this purpose, the dielectric film of the MOS storage capacitor must be made thinner.
If the dielectric film is thinned to 300 .ANG. or less, however, it cannot withstand an anomalously high electric field which is induced during the manufacturing process between the upper electrode of the MOS capacitor and the semiconductor substrate as the lower electrode. The inducement of the anomalously high electric field is caused by static charges which are generated during the reactive ion etching process for forming the gate electrode after formation of the upper electrode of the MOS capacitor and during the ion implantation to form the source and drain regions by using the gate electrode as a mask, and accumulated on the semiconductor substrate and on the upper electrode of the MOS capacitor. During the reactive ion etching, for example, the surface of the semiconductor substrate is positively charged while the upper electrode of the MOS capacitor is negativelv charged. A potential difference of 20 to 50 volts is thereby generated between the upper and lower electrodes of the MOS capacitor and this potential difference breaks down the dielectric film of the MOS capacitor. This lowers the yield and the reliability of the semiconductor memory device.